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Stay up to date with the latest news from AerieLogic.

Formal Verification IPs

Formal-VIPs automatically and exhaustively prove that your design is 100% compliant with the bus-protocol,without any need for assertions or formal verification knowledge.Best of all, these Formal-VIPs work with your favorite formal verification tool. Please visit the following links for details:

  OCP Formal-VIP            OCP exhaustive  protocol checking solution

  AXI Formal-VIP             AXI/APB exhaustive  protocol checking solution

  AHB Formal-VIP            AHB/APB exhaustive  protocol checking solution

  I2C Forma-VIP            I2C exhaustive protocol checking solution

If you do not find your protocol listed above, please contact us at for availability of other protocols.

OEM Products

AerieLogic leverages its team's extensive experience in industry-oriented formal verification to propose state-of-the-art OEM products for integration by third-party EDA or CAD companies. Please visit the following links for details:

  Formal Plugins        Formal Verification capability for OEM
 

Latest News

 May 2008 [more]
I2C Formal-VIP available

April 2008 [more]
The COCONUT european project

March 2008 [more]
FVIP-wizard v1.7.0 available

 

February 2008 [more]
Formal-VIPs support for Synopsys VCS 

January 2008 [more]
Please visit us on booth 504 at the EDSF fair held in Japan 

December 2007 [more]
Formal-VIPs support for Solidify from Averant

October 2007 [more]
White-paper available

August 2007 [more]
Formal-VIPs support for Cadence IFV and NC-Sim

June, 2007 [more]
AerieLogic joins Cadence's Verification Alliance

April, 2007 [more]
AerieLogic at DATE'07

March 1, 2007 [more]
Formal Verification IPs for SoC designs

February 1, 2007 [more]
Vertigo project presented in EETimes 

January 19th, 2007 [more]
OCP 2.2 HPK formal library of assertions now available

December 20, 2006 [more]
AerieLogic opens direct sales in Japan

November 22, 2006 [more]
AerieLogic opens distribution channel in Germany / Austria
 
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